{"title":"Reed-Solomon编解码器的可重构多模式体系结构","authors":"Siwei Tan, Hong Pan","doi":"10.1109/CISE.2010.5677175","DOIUrl":null,"url":null,"abstract":"In order to save the hardware cost and reduce the power consuming in Reed-Solomon codec, a reconfigurable multi-mode codec is presented, which provides support to encoder and decoder. The reconfigurable calculation module (RCM) in the codec can be reconfigured to perform as a linear feedback shift register (LFSR), syndrome generator and Chien's search algorithm calculator and can handle variable error correction capability (0<t≤8). The design, written in hardware description language (HDL), was realized by using Altera's FPGA. The result proves that the codec could operation at a max frequency of 90 MHz, and the total logic element count is 2887. This design is suitable for systems such as cable modem and digital video broadcasting (DVB).","PeriodicalId":232832,"journal":{"name":"2010 International Conference on Computational Intelligence and Software Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Reconfigurable Multi-Mode Architecture for Reed-Solomon Codec\",\"authors\":\"Siwei Tan, Hong Pan\",\"doi\":\"10.1109/CISE.2010.5677175\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order to save the hardware cost and reduce the power consuming in Reed-Solomon codec, a reconfigurable multi-mode codec is presented, which provides support to encoder and decoder. The reconfigurable calculation module (RCM) in the codec can be reconfigured to perform as a linear feedback shift register (LFSR), syndrome generator and Chien's search algorithm calculator and can handle variable error correction capability (0<t≤8). The design, written in hardware description language (HDL), was realized by using Altera's FPGA. The result proves that the codec could operation at a max frequency of 90 MHz, and the total logic element count is 2887. This design is suitable for systems such as cable modem and digital video broadcasting (DVB).\",\"PeriodicalId\":232832,\"journal\":{\"name\":\"2010 International Conference on Computational Intelligence and Software Engineering\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Computational Intelligence and Software Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CISE.2010.5677175\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Computational Intelligence and Software Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CISE.2010.5677175","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Reconfigurable Multi-Mode Architecture for Reed-Solomon Codec
In order to save the hardware cost and reduce the power consuming in Reed-Solomon codec, a reconfigurable multi-mode codec is presented, which provides support to encoder and decoder. The reconfigurable calculation module (RCM) in the codec can be reconfigured to perform as a linear feedback shift register (LFSR), syndrome generator and Chien's search algorithm calculator and can handle variable error correction capability (0
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