An Approach for Designing Boolean Functions with Decoders

The paper presents an approach for designing different Boolean functions with a cascade of decoders and additional logic gates based on their schematic view and their testing on the laboratory module built with Spartan-6 FPGA units. The module, developed at the University of Ruse, is planned for using in the courses "Digital Electronics" and "Pulse and Digital Devices", familiarizing the bachelors of the electro-specialties to the basic problems of digital electronics.