{"title":"码变换器中等效发生器两种实现方法的比较分析","authors":"Anna Makarenko, D. Rakhlis, S. Kavun","doi":"10.1109/PICST54195.2021.9772118","DOIUrl":null,"url":null,"abstract":"The algorithm of functioning tables' formation of the basic non-standard node (equivalents generator) by the method of equivalents accumulation was been considered in the code converters. Formulas for lines amount in the functioning table of the equivalent's generator were been obtained. In comparison with the serial strategy, the proposed author's method allows to reduce the amount of the conversion cycles of the two-steps parallel code converters from 7 to 5 steps (increase the performance at 28,57%), and for the three-step parallel code converters - from 4 to 3 steps (increase the performance at 25%). The conducted researches allow accelerating a stage of a system design of the code converters with the parallel strategy of the step usage, increasing code converters performance and reducing hardware expenses of the construction of the main non-standard node of the equivalents generator and code converters in generally. An advantage by the method of equivalents accumulation of code converters in comparison with other methods is a high calculation performance and the possibility of changing in the wide boundaries of the ratio between speed and hardware expenses.","PeriodicalId":391592,"journal":{"name":"2021 IEEE 8th International Conference on Problems of Infocommunications, Science and Technology (PIC S&T)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Comparative Analysis of Two Implementation Methods of the Equivalents Generator in the Code Converters\",\"authors\":\"Anna Makarenko, D. Rakhlis, S. Kavun\",\"doi\":\"10.1109/PICST54195.2021.9772118\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The algorithm of functioning tables' formation of the basic non-standard node (equivalents generator) by the method of equivalents accumulation was been considered in the code converters. Formulas for lines amount in the functioning table of the equivalent's generator were been obtained. In comparison with the serial strategy, the proposed author's method allows to reduce the amount of the conversion cycles of the two-steps parallel code converters from 7 to 5 steps (increase the performance at 28,57%), and for the three-step parallel code converters - from 4 to 3 steps (increase the performance at 25%). The conducted researches allow accelerating a stage of a system design of the code converters with the parallel strategy of the step usage, increasing code converters performance and reducing hardware expenses of the construction of the main non-standard node of the equivalents generator and code converters in generally. An advantage by the method of equivalents accumulation of code converters in comparison with other methods is a high calculation performance and the possibility of changing in the wide boundaries of the ratio between speed and hardware expenses.\",\"PeriodicalId\":391592,\"journal\":{\"name\":\"2021 IEEE 8th International Conference on Problems of Infocommunications, Science and Technology (PIC S&T)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 8th International Conference on Problems of Infocommunications, Science and Technology (PIC S&T)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PICST54195.2021.9772118\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 8th International Conference on Problems of Infocommunications, Science and Technology (PIC S&T)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PICST54195.2021.9772118","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Comparative Analysis of Two Implementation Methods of the Equivalents Generator in the Code Converters
The algorithm of functioning tables' formation of the basic non-standard node (equivalents generator) by the method of equivalents accumulation was been considered in the code converters. Formulas for lines amount in the functioning table of the equivalent's generator were been obtained. In comparison with the serial strategy, the proposed author's method allows to reduce the amount of the conversion cycles of the two-steps parallel code converters from 7 to 5 steps (increase the performance at 28,57%), and for the three-step parallel code converters - from 4 to 3 steps (increase the performance at 25%). The conducted researches allow accelerating a stage of a system design of the code converters with the parallel strategy of the step usage, increasing code converters performance and reducing hardware expenses of the construction of the main non-standard node of the equivalents generator and code converters in generally. An advantage by the method of equivalents accumulation of code converters in comparison with other methods is a high calculation performance and the possibility of changing in the wide boundaries of the ratio between speed and hardware expenses.