{"title":"基于LMS的高速高分辨率ADC超快速非线性测试与校准方法","authors":"Ting Li, Yabo Ni, Yong Zhang, Chao Chen","doi":"10.1109/asid52932.2021.9651698","DOIUrl":null,"url":null,"abstract":"This paper presents an LMS(Least Mean Square) based nonlinear error extraction and calibration algorithm for pipeline ADC(analog-to-digital converter ). In this algorithm, the nonlinear error of ADC is treated as the internal error of each stage and the gain error between stages. When testing, a known high quality signal is sent to the ADC and the error parameters are calculated using the digital output codes. Compared to traditional histogram testing, this method using much fewer samples. During calibration, the method proposed in this paper is used to eliminate the nonlinear error digitally from the digital output code of ADC. Only 4000 samples were used, the non linearity of the 14-bit high speed high resolution pipeline ADC can be extracted and removed so that the ADC can achieve less than 1.5 least significant bit (LSB) integral nonlinearity (INL) which is reduced by 78%. The measurement results illustrates the effectiveness of the method, after calibration, the ADC signal to noise and distortion ratio (SINAD) is improved from 65dBFS to 69dBFS and the spurious-free dynamic range (SFDR) is improved from 75dBFS to 92dBFS. The algorithm proposed in this paper is especially suitable for multistage ADC and can also be used for all types of ADCs.","PeriodicalId":150884,"journal":{"name":"2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2021-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"LMS Based Ultra-Fast Non Linearity Test and Calibration Method for High-speed and High-Resolution ADC\",\"authors\":\"Ting Li, Yabo Ni, Yong Zhang, Chao Chen\",\"doi\":\"10.1109/asid52932.2021.9651698\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an LMS(Least Mean Square) based nonlinear error extraction and calibration algorithm for pipeline ADC(analog-to-digital converter ). In this algorithm, the nonlinear error of ADC is treated as the internal error of each stage and the gain error between stages. When testing, a known high quality signal is sent to the ADC and the error parameters are calculated using the digital output codes. Compared to traditional histogram testing, this method using much fewer samples. During calibration, the method proposed in this paper is used to eliminate the nonlinear error digitally from the digital output code of ADC. Only 4000 samples were used, the non linearity of the 14-bit high speed high resolution pipeline ADC can be extracted and removed so that the ADC can achieve less than 1.5 least significant bit (LSB) integral nonlinearity (INL) which is reduced by 78%. The measurement results illustrates the effectiveness of the method, after calibration, the ADC signal to noise and distortion ratio (SINAD) is improved from 65dBFS to 69dBFS and the spurious-free dynamic range (SFDR) is improved from 75dBFS to 92dBFS. The algorithm proposed in this paper is especially suitable for multistage ADC and can also be used for all types of ADCs.\",\"PeriodicalId\":150884,\"journal\":{\"name\":\"2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/asid52932.2021.9651698\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 15th International Conference on Anti-counterfeiting, Security, and Identification (ASID)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/asid52932.2021.9651698","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
LMS Based Ultra-Fast Non Linearity Test and Calibration Method for High-speed and High-Resolution ADC
This paper presents an LMS(Least Mean Square) based nonlinear error extraction and calibration algorithm for pipeline ADC(analog-to-digital converter ). In this algorithm, the nonlinear error of ADC is treated as the internal error of each stage and the gain error between stages. When testing, a known high quality signal is sent to the ADC and the error parameters are calculated using the digital output codes. Compared to traditional histogram testing, this method using much fewer samples. During calibration, the method proposed in this paper is used to eliminate the nonlinear error digitally from the digital output code of ADC. Only 4000 samples were used, the non linearity of the 14-bit high speed high resolution pipeline ADC can be extracted and removed so that the ADC can achieve less than 1.5 least significant bit (LSB) integral nonlinearity (INL) which is reduced by 78%. The measurement results illustrates the effectiveness of the method, after calibration, the ADC signal to noise and distortion ratio (SINAD) is improved from 65dBFS to 69dBFS and the spurious-free dynamic range (SFDR) is improved from 75dBFS to 92dBFS. The algorithm proposed in this paper is especially suitable for multistage ADC and can also be used for all types of ADCs.