用于MPEG-4 ASP@L5纹理编码的半像素运动估计IP核实现

The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI:10.1109/APCCAS.2004.1412714

He Wei-feng, Gao Zhi-qiang, Mao Zhi-gang, Zhang Yan

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引用次数: 0

摘要

针对MPEG-4 ASP@L5编码器，提出了一种高效的全流水线并行1-D和2-D混合运动估计阵列架构。与大多数先前提出的运动估计处理器不同，该设计可以在全分辨率和半分辨率下处理8/spl次/块和16 /spl次/ 6个宏块运动估计，具有不同的搜索范围。实验结果表明，该算法能够在100MHz左右实时估计ITU-R601格式MPEG-4 AS Profile的半像素纹理运动向量。

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Implementation of half-pel motion estimation IP core for MPEG-4 ASP@L5 texture coding

An efficient fully pipelined parallel 1-D and 2-D mixed motion estimation array architecture for MPEG-4 ASP@L5 encoder is proposed in This work. Unlike most previously presented motion estimation processors, this design can deal with 8/spl times/ block and 16 /spl times/ 6 macroblock motion estimation with different searching ranges in full-pel and half-pel resolution. Experimental results show that it is able to estimate half-pel texture motion vectors of MPEG-4 AS Profile in ITU-R601 format in real-time at around 100MHz.

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The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.

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