低功耗数字电路设计

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI:10.1109/ESSDER.2004.1356476

T. Sakurai

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引用次数: 11

摘要

本文介绍了实现低功耗数字电路的方法。从空间粒度、时间粒度和可变粒度的角度对这些方法进行了分类。目前的趋势是从粗颗粒转向细颗粒，以节省更多的电力和更高的工程成本。较新的方法包括在块水平上对V/sub DD/和V/sub TH/进行动态自适应控制。这篇论文还涉及了低功耗应用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low power digital circuit design

The paper describes approaches for achieving low power digital circuits. The approaches are classified from the standpoint of spatial granularity, temporal granularity and variable granularity. The trend is moving from coarse-grain to the finer grain to save more power with the higher engineering cost. The newer approach includes dynamic adaptive control of V/sub DD/ and V/sub TH/ at a block level. The paper also touches on low-power applications.

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来源期刊

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

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