Reliability lifetest on etch-stop 0.5-/spl mu/m PHEMT with reduced gate pitch and ohmic width geometry

In today’s highly competitive semiconductor IC market, it is critical to address the market requirements of low cost, superb performance, and high reliability for the success of any product. It becomes increasingly challenging to meet these requirements that sometimes conflict with each other. Skyworks recently developed a third generation pseudomorphic high electron mobility transistor (PHEMT) process with reduced gate pitch and ohmic width geometry to increase the FET density factor. While this initiative significantly improves the throughput, we have launched a series of reliability experiments to assess the possible impacts on device reliability. Potential issues include greater leakage, smaller breakdown voltage, and hotter channel under the same electrical bias conditions.