可集成的双金属栅极/高k CMOS解决方案，适用于FD-SOI和MuGFET技术

2005 IEEE International SOI Conference Proceedings Pub Date : 2005-12-27 DOI:10.1109/SOI.2005.1563572

Z.B. Zhang, S.C. Song, K. Choi, J. H. Sim, P. Majhi, B. Lee

{"title":"可集成的双金属栅极/高k CMOS解决方案，适用于FD-SOI和MuGFET技术","authors":"Z.B. Zhang, S.C. Song, K. Choi, J. H. Sim, P. Majhi, B. Lee","doi":"10.1109/SOI.2005.1563572","DOIUrl":null,"url":null,"abstract":"This paper describes a simple process that can tune the work function of ALD TaCN gate electrode on HfO/sub 2/ from 4.47eV to 4.77eV by adding a CVD TiN overlayer. It also discusses the device characteristics of TaCN and TiN/TaCN (TaCN with a TiN overlayer) metal gate/high-k MOSFETs and presents a manufacturable process for integrating dual metal gate/high-k CMOS in a FD-FET technology.","PeriodicalId":116606,"journal":{"name":"2005 IEEE International SOI Conference Proceedings","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An integratable dual metal gate/high-k CMOS solution for FD-SOI and MuGFET technologies\",\"authors\":\"Z.B. Zhang, S.C. Song, K. Choi, J. H. Sim, P. Majhi, B. Lee\",\"doi\":\"10.1109/SOI.2005.1563572\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a simple process that can tune the work function of ALD TaCN gate electrode on HfO/sub 2/ from 4.47eV to 4.77eV by adding a CVD TiN overlayer. It also discusses the device characteristics of TaCN and TiN/TaCN (TaCN with a TiN overlayer) metal gate/high-k MOSFETs and presents a manufacturable process for integrating dual metal gate/high-k CMOS in a FD-FET technology.\",\"PeriodicalId\":116606,\"journal\":{\"name\":\"2005 IEEE International SOI Conference Proceedings\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE International SOI Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2005.1563572\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2005.1563572","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 6

摘要

本文介绍了一种简单的方法，通过添加CVD TiN覆盖层，可以将HfO/ sub2 /上的ALD TaCN栅电极的工作函数从4.47eV调节到4.77eV。本文还讨论了TaCN和TiN/TaCN (TiN覆盖层的TaCN)金属栅/高k mosfet的器件特性，并提出了在FD-FET技术中集成双金属栅/高k CMOS的可制造工艺。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An integratable dual metal gate/high-k CMOS solution for FD-SOI and MuGFET technologies

This paper describes a simple process that can tune the work function of ALD TaCN gate electrode on HfO/sub 2/ from 4.47eV to 4.77eV by adding a CVD TiN overlayer. It also discusses the device characteristics of TaCN and TiN/TaCN (TaCN with a TiN overlayer) metal gate/high-k MOSFETs and presents a manufacturable process for integrating dual metal gate/high-k CMOS in a FD-FET technology.

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2005 IEEE International SOI Conference Proceedings

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