Y. Nakakura, K. M. Sameky, Y. Tue, I. Okabayashi, M. Nakajima, S. Karino, K. Kaneko, H. Kadota
{"title":"一种用于并行处理器系统的通用数据传输控制单元","authors":"Y. Nakakura, K. M. Sameky, Y. Tue, I. Okabayashi, M. Nakajima, S. Karino, K. Kaneko, H. Kadota","doi":"10.1109/VLSIC.1989.1037466","DOIUrl":null,"url":null,"abstract":"1. Intrdudirm VLSl parallel pmwssor system Is one of pmmlslng candldates for the future machine to carry out heavy-duty numerlcal computation. For the parallel system. not only PElprocessor element) operation speed but also Inter-PE data transfer Is very Important to achleve high performance. Especially. in the parallel processor system with localized memories and a connection network. there are two malor questions : \"haw to realize emcient data transfer between local memories wlth mlnlmum lnterference wlth PE operatlons.\" and \"how to assign the data In local memories? A new VLSI controller has been dmloped as a versatile data-transfcr control unR, X U , In a hlgh-prrfmmancc parallel pmccsor system : ADENAUI. The chtp gives some answers to the questions by the hardware. In this paper. the archltecture and the operations of TCU and the circults far the dedicated addrwslng block Address Generator are cxplalned. The chlp layout techniques are also discussed.","PeriodicalId":136228,"journal":{"name":"Symposium 1989 on VLSI Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A versatile data-transfer control unit for a parallel processor system\",\"authors\":\"Y. Nakakura, K. M. Sameky, Y. Tue, I. Okabayashi, M. Nakajima, S. Karino, K. Kaneko, H. Kadota\",\"doi\":\"10.1109/VLSIC.1989.1037466\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"1. Intrdudirm VLSl parallel pmwssor system Is one of pmmlslng candldates for the future machine to carry out heavy-duty numerlcal computation. For the parallel system. not only PElprocessor element) operation speed but also Inter-PE data transfer Is very Important to achleve high performance. Especially. in the parallel processor system with localized memories and a connection network. there are two malor questions : \\\"haw to realize emcient data transfer between local memories wlth mlnlmum lnterference wlth PE operatlons.\\\" and \\\"how to assign the data In local memories? A new VLSI controller has been dmloped as a versatile data-transfcr control unR, X U , In a hlgh-prrfmmancc parallel pmccsor system : ADENAUI. The chtp gives some answers to the questions by the hardware. In this paper. the archltecture and the operations of TCU and the circults far the dedicated addrwslng block Address Generator are cxplalned. The chlp layout techniques are also discussed.\",\"PeriodicalId\":136228,\"journal\":{\"name\":\"Symposium 1989 on VLSI Circuits\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Symposium 1989 on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1989.1037466\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1989 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1989.1037466","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A versatile data-transfer control unit for a parallel processor system
1. Intrdudirm VLSl parallel pmwssor system Is one of pmmlslng candldates for the future machine to carry out heavy-duty numerlcal computation. For the parallel system. not only PElprocessor element) operation speed but also Inter-PE data transfer Is very Important to achleve high performance. Especially. in the parallel processor system with localized memories and a connection network. there are two malor questions : "haw to realize emcient data transfer between local memories wlth mlnlmum lnterference wlth PE operatlons." and "how to assign the data In local memories? A new VLSI controller has been dmloped as a versatile data-transfcr control unR, X U , In a hlgh-prrfmmancc parallel pmccsor system : ADENAUI. The chtp gives some answers to the questions by the hardware. In this paper. the archltecture and the operations of TCU and the circults far the dedicated addrwslng block Address Generator are cxplalned. The chlp layout techniques are also discussed.