{"title":"基于RRAM模块的无参考多电平忆阻器","authors":"Ahmed A. M. Emara, M. Ghoneima","doi":"10.1109/MWSCAS.2015.7282147","DOIUrl":null,"url":null,"abstract":"This paper presents a robust reference-less multilevel memristor based Resistive RAM (RRAM) module. In contrast to similar multilevel RRAMs, the proposed multilevel module eliminates the need for any comparing reference level. Because of the use of a differential 1T2M memory cell, data decoding is performed with traditional standard cells. On the other hand, no feedback loops are needed to ensure read, write and data decoding correctness. In addition, the proposed module is pinout compatible with the traditional 6T SRAM module. Simulation results, along with a comparison with other memristor based multilevel modules are presented.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A reference-less multilevel memristor based RRAM module\",\"authors\":\"Ahmed A. M. Emara, M. Ghoneima\",\"doi\":\"10.1109/MWSCAS.2015.7282147\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a robust reference-less multilevel memristor based Resistive RAM (RRAM) module. In contrast to similar multilevel RRAMs, the proposed multilevel module eliminates the need for any comparing reference level. Because of the use of a differential 1T2M memory cell, data decoding is performed with traditional standard cells. On the other hand, no feedback loops are needed to ensure read, write and data decoding correctness. In addition, the proposed module is pinout compatible with the traditional 6T SRAM module. Simulation results, along with a comparison with other memristor based multilevel modules are presented.\",\"PeriodicalId\":216613,\"journal\":{\"name\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2015.7282147\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282147","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A reference-less multilevel memristor based RRAM module
This paper presents a robust reference-less multilevel memristor based Resistive RAM (RRAM) module. In contrast to similar multilevel RRAMs, the proposed multilevel module eliminates the need for any comparing reference level. Because of the use of a differential 1T2M memory cell, data decoding is performed with traditional standard cells. On the other hand, no feedback loops are needed to ensure read, write and data decoding correctness. In addition, the proposed module is pinout compatible with the traditional 6T SRAM module. Simulation results, along with a comparison with other memristor based multilevel modules are presented.