NVNA测量晶体管的紧凑和行为建模:新趋势和未来趋势

D. Root, Jianjun Xu, F. Sischka, M. Marcu, J. Horn, R. M. Biernacki, M. Iwamoto
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引用次数: 10

摘要

本文回顾了三种现代晶体管建模流程,这些流程是由商用非线性矢量网络分析仪(NVNA)的大信号波形和/或x参数1测量实现的。与传统的直流和线性s参数测量相比,NVNA晶体管表征更安全地在更宽的工作域内测试器件,更能表明器件在实际使用条件下的大信号响应,比脉冲I-V方法提供更快的时间尺度数据,并提供大信号模型验证,这是一个免费的额外好处。在考虑的第一个流程中,NVNA波形数据被用作提取和调整紧凑模型参数值的目标,并用于大信号条件下的模型验证。在第二流中,利用NVNA波形数据直接构建适用于GaAs和GaN场效应管的先进电热和陷阱相关紧凑模型的多变量非线性电流源和基于电荷的非线性电容函数,有效地绕过了显式模型本构关系公式的需要。最后一种方法是基于NVNA支持的x参数测量和行为建模框架,直接在频域生成非线性晶体管模型。晶体管的x参数方法的最新进展,包括简单的几何可扩展性,显示了在某些条件下有用的器件模型的早期潜力,而不需要指定内部拓扑或等效电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Compact and behavioral modeling of transistors from NVNA measurements: New flows and future trends
This paper reviews three modern transistor modeling flows enabled by large-signal waveform and/or X-parameter1 measurements from a commercially available nonlinear vector network analyzer (NVNA) instrument. NVNA transistor characterization more safely exercises the device over a wider operating domain than is possible with conventional DC and linear S-parameter measurements, is more indicative of the device large-signal response in actual use conditions, provides data at much faster timescales than pulsed I-V methods, and provides large-signal model validation as a free additional benefit. In the first flow considered, NVNA waveform data is used as a target to extract and tune compact model parameter values and for model validation under large-signal conditions. In the second flow, NVNA waveform data is used to directly construct the multi-variate nonlinear current-source and charge-based nonlinear capacitor functions of an advanced electrothermal and trap-dependent compact model suitable for GaAs and GaN FETs, effectively bypassing the need for explicit model constitutive relation formulation. The final approach is based on the X-parameter measurement and behavioral modeling framework supported by the NVNA, producing nonlinear transistor models directly in the frequency domain. Recent advances in X-parameter methods for transistors, including simple scalability with geometry, show early potential for useful device models, under certain conditions, without the requirement of specifying an internal topology or equivalent circuit at all.
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