WSI顺序体系结构可测试性的周期分析

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI:10.1109/ICWSI.1994.291252

M. Bombana, G. Buonanno, P. Cavalloro, Fabrizio Ferrandi, D. Sciuto, G. Zaza

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引用次数: 2

摘要

可测试性分析可以通过对所有可能的简单互连拓扑进行分类，定义构成电路的单元所执行的功能的可测试性条件，确定这种互连的组成规则和确定的可测试性条件来进行。这种方法在研究前馈体系结构时都很有效。本文介绍了这种方法在具有周期(信号反馈)的不规则结构中的应用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Cycles analysis for testability of WSI sequential architectures

Testability analysis can he performed through classification of all possible simple interconnection topologies, definition of testability conditions on the functions performed by the cells composing the circuit and identification of the composition rules of such interconnections and of the testability conditions determined. This approach works well whenever feed-forward architectures are studied. Application of such approach to irregular architectures with cycles (signal feedbacks) is presented in this paper.<>

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Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI)

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