Fault Tolerant Reversible Finite Field Arithmetic Circuits

In this paper, we present a systematic method for the designing fault tolerant reversible arithmetic circuits for finite field or Galois fields of the form GF(2m). To tackle the problem of errors in computation, we propose error detection and correction using multiple parity prediction technique based on low density parity check (LDPC) code. For error detection and correction, we need additional garbage outputs. Our technique, when compared with traditional fault tolerant approach gives better implementation cost.