设计可靠性:避免集成电路互连中迁移引起的故障

2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) Pub Date : 2022-08-22 DOI:10.1109/SBCCI55532.2022.9893237

Susann Rothe, J. Lienig

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引用次数: 2

摘要

集成电路的可靠性日益受到金属互连迁移退化的威胁。由于迁移而导致的故障风险不仅在每个新技术节点中都在上升，而且还限制了互连结构的小型化。除了直流线路，例如电力输送网络，信号和时钟线路也越来越受到迁移的影响。本文总结了目前在避免迁移引起的集成电路故障方面的知识。在介绍和讨论了迁移机制之后，我们重点讨论了电迁移敏感性的增加和热迁移的影响。展望未来，我们回顾了将迁移约束和缓解措施纳入布局综合的新型IC设计策略。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Reliability by Design: Avoiding Migration-Induced Failure in IC Interconnects

The reliability of integrated circuits is increasingly endangered by migration-induced degradation of metal interconnects. The risk of failure due to migration is not only rising in every new technology node, it is also constraining the miniaturization of interconnect structures. In addition to DC lines, such as power delivery networks, signal and clock lines are increasingly being degraded by migration. This paper summarizes our current knowledge in avoiding migration-induced integrated-circuit failures. After introducing and discussing migration mechanisms, we focus on the growing electromigration susceptibility and the increasing influence of thermal migration. Looking forward, we review novel IC design strategies that incorporate migration constraints and mitigation measures into layout synthesis.

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来源期刊

2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)

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