基于45nm CMOS技术的可靠5G堆叠功率放大器

Zhize Ma, Saleh Mohammadi
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引用次数: 0

摘要

提出了一种适用于第五代(5G)宽带蜂窝标准的堆叠晶体管微波功率放大器。PA采用六个先进的NMOS晶体管(在45nm CMOS SOI技术中具有32nm长度的adnfet)的堆栈实现,并使用来自单个电源VDD的动态偏置方案。只需调整VDD即可将工作模式从ab类调整为a类。在VDD为9V(每个晶体管1.5V),工作频率为23 GHz的情况下,最大测量输出功率达到21.5 dBm。在较小的7V电源下,PAE峰值为38.4%。在22GHz ~ 27ghz范围内输出功率大于20dbm。与采用相同技术但使用常规NFET晶体管的类似设计相比,包括估计可靠性特性在内的整体性能得到了改善。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Reliable 5G Stacked Power Amplifier in 45nm CMOS Technology
A stacked transistor microwave power amplifier (PA) operating in fifth generation (5G) broadband cellular standard is presented. The PA is implemented using stack of six advanced NMOS transistors (ADNFETs with 32 nm length in a 45nm CMOS SOI technology) and using a dynamic biasing scheme from a single power supply VDD. The operation mode can be tuned from Class-AB to Class-A by simply adjusting the VDD. Under an applied VDD of 9V (1.5V per transistor) and operating frequency of 23 GHz, the maximum measured output power reaches 21.5 dBm. At a smaller power supply of 7V, the PAE peaks at 38.4%. The PA outputs more than 20 dBm of power from 22GHz to 27 GHz. The overall performance including estimated reliability characteristics is improved compared to a similar design in the same technology but with regular NFET transistors.
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