{"title":"用于EDGE/GSM的3mW连续时间/spl Sigma//spl Delta/-调制器，具有高相邻信道容限","authors":"M. Schimper, Lukas Dörrer, E. Riccio, G. Panov","doi":"10.1109/ESSCIR.2004.1356648","DOIUrl":null,"url":null,"abstract":"A continuous-time 4th-order multi-bit /spl Sigma//spl Delta/-modulator for GSM/EDGE is presented. By introduction of a direct feed-forward path from the input to the quantiser, high immunity to adjacent channel interferers is achieved. The dynamic range is 90 dB (>14-bit) over a 240 kHz signal bandwidth. Accurate modelling allows optimisation of excess loop delay, thus yielding a very low power consumption of 3 mW at 1.25 V supply voltage. The modulator is clocked at 26 MHz (oversampling ratio=54). It occupies 0.5 mm/sup 2/ in a 0.13 /spl mu/m CMOS technology.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"39","resultStr":"{\"title\":\"A 3mW continuous-time /spl Sigma//spl Delta/-modulator for EDGE/GSM with high adjacent channel tolerance\",\"authors\":\"M. Schimper, Lukas Dörrer, E. Riccio, G. Panov\",\"doi\":\"10.1109/ESSCIR.2004.1356648\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A continuous-time 4th-order multi-bit /spl Sigma//spl Delta/-modulator for GSM/EDGE is presented. By introduction of a direct feed-forward path from the input to the quantiser, high immunity to adjacent channel interferers is achieved. The dynamic range is 90 dB (>14-bit) over a 240 kHz signal bandwidth. Accurate modelling allows optimisation of excess loop delay, thus yielding a very low power consumption of 3 mW at 1.25 V supply voltage. The modulator is clocked at 26 MHz (oversampling ratio=54). It occupies 0.5 mm/sup 2/ in a 0.13 /spl mu/m CMOS technology.\",\"PeriodicalId\":294077,\"journal\":{\"name\":\"Proceedings of the 30th European Solid-State Circuits Conference\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"39\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 30th European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIR.2004.1356648\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIR.2004.1356648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 3mW continuous-time /spl Sigma//spl Delta/-modulator for EDGE/GSM with high adjacent channel tolerance
A continuous-time 4th-order multi-bit /spl Sigma//spl Delta/-modulator for GSM/EDGE is presented. By introduction of a direct feed-forward path from the input to the quantiser, high immunity to adjacent channel interferers is achieved. The dynamic range is 90 dB (>14-bit) over a 240 kHz signal bandwidth. Accurate modelling allows optimisation of excess loop delay, thus yielding a very low power consumption of 3 mW at 1.25 V supply voltage. The modulator is clocked at 26 MHz (oversampling ratio=54). It occupies 0.5 mm/sup 2/ in a 0.13 /spl mu/m CMOS technology.
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