一种16nm FinFET 0.4 V无电感蜂窝接收器前端,10 mW超低功耗,0.31 mm2超小面积,用于sub-6 GHz频段的5G系统

E. Yeh, An-Hsun Lo, Wen-Sheng Chen, Tsu-Jin Yeh, Mark Chen
{"title":"一种16nm FinFET 0.4 V无电感蜂窝接收器前端,10 mW超低功耗,0.31 mm2超小面积,用于sub-6 GHz频段的5G系统","authors":"E. Yeh, An-Hsun Lo, Wen-Sheng Chen, Tsu-Jin Yeh, Mark Chen","doi":"10.23919/VLSIC.2017.8008553","DOIUrl":null,"url":null,"abstract":"This work presents an inductor-less 0.4 V cellular receiver (RX) front-end with an ultra-low power of 10 mW and an ultra-small area 0.31 mm2 in 16 nm FinFET technology, which enables massive receivers in a single chip for 10 Gb/s high throughput 5G system in sub-6 GHz band. The proposed inductor-less low-Vdd RX front-end consists of an LNA, passive mixers, LO generator and 20MHz bandwidth channel filters. By using the proposed current stabilization circuit in 0.4 V channel filter, the current variation with process corners is greatly reduced. This RX front-end can achieve a noise figure of 2.5dB, an in-band IIP3 of −6 dBm, a voltage gain of 35 dB at 2.1 GHz Band-I frequency. To the best of authors' knowledge, this work demonstrates the lowest power consumption with minimum chip area and a competitive performance under the lowest supply voltage of 0.4 V, compared with the prior arts.","PeriodicalId":176340,"journal":{"name":"2017 Symposium on VLSI Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 16 nm FinFET 0.4 V inductor-less cellular receiver front-end with 10 mW ultra-low power and 0.31 mm2 ultra-small area for 5G system in sub-6 GHz band\",\"authors\":\"E. Yeh, An-Hsun Lo, Wen-Sheng Chen, Tsu-Jin Yeh, Mark Chen\",\"doi\":\"10.23919/VLSIC.2017.8008553\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents an inductor-less 0.4 V cellular receiver (RX) front-end with an ultra-low power of 10 mW and an ultra-small area 0.31 mm2 in 16 nm FinFET technology, which enables massive receivers in a single chip for 10 Gb/s high throughput 5G system in sub-6 GHz band. The proposed inductor-less low-Vdd RX front-end consists of an LNA, passive mixers, LO generator and 20MHz bandwidth channel filters. By using the proposed current stabilization circuit in 0.4 V channel filter, the current variation with process corners is greatly reduced. This RX front-end can achieve a noise figure of 2.5dB, an in-band IIP3 of −6 dBm, a voltage gain of 35 dB at 2.1 GHz Band-I frequency. To the best of authors' knowledge, this work demonstrates the lowest power consumption with minimum chip area and a competitive performance under the lowest supply voltage of 0.4 V, compared with the prior arts.\",\"PeriodicalId\":176340,\"journal\":{\"name\":\"2017 Symposium on VLSI Circuits\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSIC.2017.8008553\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIC.2017.8008553","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

摘要

本研究提出了一种无电感的0.4 V蜂窝接收器(RX)前端,采用16nm FinFET技术,超低功率为10mw,超小面积为0.31 mm2,可在单个芯片上实现10gb /s高吞吐量5G系统。所提出的无电感低vdd RX前端由LNA、无源混频器、LO发生器和20MHz带宽信道滤波器组成。通过在0.4 V通道滤波器中使用该稳流电路,大大减小了电流随工艺角的变化。该RX前端在2.1 GHz Band-I频率下噪声系数为2.5dB,带内IIP3为- 6 dBm,电压增益为35 dB。据作者所知,这项工作与现有技术相比,在最低0.4 V的电源电压下,以最小的芯片面积和最低的功耗展示了具有竞争力的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 16 nm FinFET 0.4 V inductor-less cellular receiver front-end with 10 mW ultra-low power and 0.31 mm2 ultra-small area for 5G system in sub-6 GHz band
This work presents an inductor-less 0.4 V cellular receiver (RX) front-end with an ultra-low power of 10 mW and an ultra-small area 0.31 mm2 in 16 nm FinFET technology, which enables massive receivers in a single chip for 10 Gb/s high throughput 5G system in sub-6 GHz band. The proposed inductor-less low-Vdd RX front-end consists of an LNA, passive mixers, LO generator and 20MHz bandwidth channel filters. By using the proposed current stabilization circuit in 0.4 V channel filter, the current variation with process corners is greatly reduced. This RX front-end can achieve a noise figure of 2.5dB, an in-band IIP3 of −6 dBm, a voltage gain of 35 dB at 2.1 GHz Band-I frequency. To the best of authors' knowledge, this work demonstrates the lowest power consumption with minimum chip area and a competitive performance under the lowest supply voltage of 0.4 V, compared with the prior arts.
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