多处理器系统下深度神经网络故障仿真中的线程级并行性

Masoomeh Karami, M. Haghbayan, M. Ebrahimi, A. Miele, J. Plosila
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引用次数: 1

摘要

高性能故障仿真是机器学习硬件在线和离线测试过程中必不可少的基础性工作之一。深度神经网络(DNN)作为机器学习程序的重要组成部分之一,广泛应用于片上系统和专用集成电路(ASIC)设计中的许多关键和非关键应用。通过对dnn进行故障模拟,随着神经元数量的增加,故障模拟时间呈指数增长。然而,神经网络的软件结构和各推理层神经元之间缺乏依赖性为多处理器平台上故障仿真时间的并行化提供了重要的机会。本文提出了一种面向永久故障和暂态故障的多层神经网络分层故障仿真技术。在故障仿真过程中,每个推理层的神经元将被分配到执行线程中。由于在分层故障仿真过程中,故障神经元与非故障神经元的行为模型相比需要成比例的巨大计算量,因此将故障神经元分配到一个线程中,而将其余神经元分配到剩余线程中。实验结果证实了该故障仿真技术在多处理器架构下的实时性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Thread-level Parallelism in Fault Simulation of Deep Neural Networks on Multi-Processor Systems
High-performance fault simulation is one of the essential and preliminary tasks in the process of online and offline testing of machine learning (ML) hardware. Deep neural networks (DNN), as one of the essential parts of ML programs, are widely used in many critical and non-critical applications in Systems-on-Chip and ASIC designs. Through fault simulation for DNNs, by increasing the number of neurons, the fault simulation time increases exponentially. However, the software architecture of neural networks and the lack of dependency between neurons in each inference layer provide significant opportunity for parallelism of the fault simulation time in a multi-processor platform. In this paper, a multi-thread technique for hierarchical fault simulation of neural network is proposed, targeting both permanent and transient faults. During the process of fault simulation the neurons for each inference layer will be distributed among the executing threads. Since in the process of hierarchical fault simulation, the faulty neuron demands proportionally enormous computation comparing to behavioural model of non-faulty neurons, the faulty neuron will be assigned to one thread while the rest of the neurons will be divided among the remaining threads. Experimental results confirm the time efficiency of the proposed fault simulation technique on multi-processor architectures.
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