{"title":"具有纠错功能的动态电流模式多值MOS存储器","authors":"Edward K. F. Lee, P. Gulak","doi":"10.1109/ISMVL.1992.186797","DOIUrl":null,"url":null,"abstract":"The design of a dynamic current-mode multivalued MOS memory, with error correction used to increase the noise margins, is presented. It is based on the current-copier and single-slope analog-to-digital conversion techniques. The noise margin of the multivalued stored data is increased by storing and comparing the least significant bits of its binary representation during each refresh cycle. Alternatively, the number of bits of precision can be increased for a given noise margin. Furthermore, this technique provides a design trade-off between noise margin and implementation area.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Dynamic current-mode multi-valued MOS memory with error correction\",\"authors\":\"Edward K. F. Lee, P. Gulak\",\"doi\":\"10.1109/ISMVL.1992.186797\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design of a dynamic current-mode multivalued MOS memory, with error correction used to increase the noise margins, is presented. It is based on the current-copier and single-slope analog-to-digital conversion techniques. The noise margin of the multivalued stored data is increased by storing and comparing the least significant bits of its binary representation during each refresh cycle. Alternatively, the number of bits of precision can be increased for a given noise margin. Furthermore, this technique provides a design trade-off between noise margin and implementation area.<<ETX>>\",\"PeriodicalId\":127091,\"journal\":{\"name\":\"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1992.186797\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1992.186797","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Dynamic current-mode multi-valued MOS memory with error correction
The design of a dynamic current-mode multivalued MOS memory, with error correction used to increase the noise margins, is presented. It is based on the current-copier and single-slope analog-to-digital conversion techniques. The noise margin of the multivalued stored data is increased by storing and comparing the least significant bits of its binary representation during each refresh cycle. Alternatively, the number of bits of precision can be increased for a given noise margin. Furthermore, this technique provides a design trade-off between noise margin and implementation area.<>