{"title":"二维元胞自动机作为二进制序列发生器的探索","authors":"E. Arvaniti, Ilias Mavridis, A. Kakarountas","doi":"10.1109/ISVLSI.2010.34","DOIUrl":null,"url":null,"abstract":"In this work a comprehensive exploration of Binary Sequence Generators (BSG) is offered, focusing on an alternative type of BSG (radix-2 counter) presenting low design complexity and interesting speed characteristics, based on 2D Cellular Automata (CA). Various “seed” configurations are explored and two architectures are examined, defining the most appropriate CA in terms of speed, silicon area and power dissipation.","PeriodicalId":187530,"journal":{"name":"2010 IEEE Computer Society Annual Symposium on VLSI","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Exploration of 2D Cellular Automata as Binary Sequence Generators\",\"authors\":\"E. Arvaniti, Ilias Mavridis, A. Kakarountas\",\"doi\":\"10.1109/ISVLSI.2010.34\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work a comprehensive exploration of Binary Sequence Generators (BSG) is offered, focusing on an alternative type of BSG (radix-2 counter) presenting low design complexity and interesting speed characteristics, based on 2D Cellular Automata (CA). Various “seed” configurations are explored and two architectures are examined, defining the most appropriate CA in terms of speed, silicon area and power dissipation.\",\"PeriodicalId\":187530,\"journal\":{\"name\":\"2010 IEEE Computer Society Annual Symposium on VLSI\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-07-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE Computer Society Annual Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2010.34\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2010.34","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Exploration of 2D Cellular Automata as Binary Sequence Generators
In this work a comprehensive exploration of Binary Sequence Generators (BSG) is offered, focusing on an alternative type of BSG (radix-2 counter) presenting low design complexity and interesting speed characteristics, based on 2D Cellular Automata (CA). Various “seed” configurations are explored and two architectures are examined, defining the most appropriate CA in terms of speed, silicon area and power dissipation.