四种多电平dram的比较仿真研究

G. Birk, D. Elliott, B. Cockburn
{"title":"四种多电平dram的比较仿真研究","authors":"G. Birk, D. Elliott, B. Cockburn","doi":"10.1109/MTDT.1999.782690","DOIUrl":null,"url":null,"abstract":"Multilevel DRAM (MLDRAM) attempts to increase storage density by recording more than one bit per cell. Several different two-bit-per-cell schemes have been described in the literature; however it is difficult to compare them directly because the original papers use different technologies and operating conditions. This paper presents a detailed simulation study that compares three published MLDRAM schemes, along with a new MLDRAM scheme that combines the speed of a MLDRAM proposed by Furuyama et al. (1989) and the noise cancellation techniques of a MLDRAM proposed by Gillingham (1996). Our SPICE simulation models use the same array size and process models for each to allow us to make direct comparisons.","PeriodicalId":166999,"journal":{"name":"Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing","volume":"95 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"A comparative simulation study of four multilevel DRAMs\",\"authors\":\"G. Birk, D. Elliott, B. Cockburn\",\"doi\":\"10.1109/MTDT.1999.782690\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multilevel DRAM (MLDRAM) attempts to increase storage density by recording more than one bit per cell. Several different two-bit-per-cell schemes have been described in the literature; however it is difficult to compare them directly because the original papers use different technologies and operating conditions. This paper presents a detailed simulation study that compares three published MLDRAM schemes, along with a new MLDRAM scheme that combines the speed of a MLDRAM proposed by Furuyama et al. (1989) and the noise cancellation techniques of a MLDRAM proposed by Gillingham (1996). Our SPICE simulation models use the same array size and process models for each to allow us to make direct comparisons.\",\"PeriodicalId\":166999,\"journal\":{\"name\":\"Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing\",\"volume\":\"95 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-08-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MTDT.1999.782690\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.1999.782690","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15

摘要

多层DRAM (MLDRAM)试图通过每个单元记录多于1位来增加存储密度。文献中描述了几种不同的每单元2位方案;然而,由于原始论文使用的技术和操作条件不同,因此很难直接进行比较。本文提出了一项详细的仿真研究,比较了三种已发表的MLDRAM方案,以及一种新的MLDRAM方案,该方案结合了Furuyama等人(1989)提出的MLDRAM的速度和Gillingham(1996)提出的MLDRAM的降噪技术。我们的SPICE模拟模型使用相同的阵列大小和过程模型,以允许我们进行直接比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A comparative simulation study of four multilevel DRAMs
Multilevel DRAM (MLDRAM) attempts to increase storage density by recording more than one bit per cell. Several different two-bit-per-cell schemes have been described in the literature; however it is difficult to compare them directly because the original papers use different technologies and operating conditions. This paper presents a detailed simulation study that compares three published MLDRAM schemes, along with a new MLDRAM scheme that combines the speed of a MLDRAM proposed by Furuyama et al. (1989) and the noise cancellation techniques of a MLDRAM proposed by Gillingham (1996). Our SPICE simulation models use the same array size and process models for each to allow us to make direct comparisons.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信