一种实用的基于fpga的开关模式功率放大器线性化的lut预失真技术

U. Cerasani, Y. Le Moullec, T. Tong
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引用次数: 5

摘要

在无线通信的背景下,功率放大器提出了一些问题。掌握线性与效率之间的权衡并不是一件小事。开关模式功率放大器可以提供高功率效率。然而,它们表现出明显的非线性,这使得它们难以应用于现代高线性调制无线系统。为了使它们能够在这样的系统中使用,介绍了一种基于lut的针对开关模式PA线性化的预失真技术。特别介绍了处理非线性预失真的整个输入区间的预失真函数的推导。以0.18µm CMOS F类功率放大器为研究案例,对所提出的方法进行了测试和评估。针对Stratix II FPGA的Matlab和DSP-Builder模块仿真结果表明,基于lut的预失真技术有效地改善了开关模式PA的线性度,平均EVM小于2%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A practical FPGA-based LUT-predistortion technology for switch-mode power amplifier linearization
In the context of wireless communications, power amplifiers raise a number of issues. Mastering the linearity vs. efficiency trade-off is not trivial. Switch-mode power amplifiers can provide high power efficiency. However, they exhibit significant nonlinearities, which make them difficult to apply in modern high linear modulation wireless systems. In order to enable their use in such systems, a LUT-based predistortion technique targeting switch-mode PA linearization is introduced. Particularly the predistortion function derivation for handling the whole input interval of the nonlinearity predistortion is described. A 0.18µm CMOS Class F power amplifier is used as the study-case for testing and evaluating the proposed approach. Matlab and DSP-Builder blocks targeting a Stratix II FPGA simulation results show that the proposed LUT-based predistortion technique effectively improves the linearity of the switch-mode PA with an average EVM of less than 2%.
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