大规模SpMV的FPGA和GPU实现

Yi Shan, Tianji Wu, Yu Wang, Bo Wang, Zilong Wang, Ningyi Xu, Huazhong Yang
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引用次数: 31

摘要

稀疏矩阵向量乘法(SpMV)是许多应用程序的基本运算。在不同平台上实现SpMV的研究很多,但很少有研究关注具有数百万维度的超大规模数据集。本文讨论了在web链接图分析应用中,利用FPGA和GPU实现大规模SpMV所面临的挑战。在FPGA实现中,根据对数据集规模和访问模式的分析,设计了任务分区和内存层次结构。在GPU实现中,我们设计了一个快速和可扩展的SpMV例程,使用改进的压缩稀疏行格式。结果表明,在StratixII EP2S180 FPGA和Radeon 5870图形卡上实现的FPGA和GPU分别比在Phenom 9550 CPU上实现的加速分别提高了29倍和30倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA and GPU implementation of large scale SpMV
Sparse matrix-vector multiplication (SpMV) is a fundamental operation for many applications. Many studies have been done to implement the SpMV on different platforms, while few work focused on the very large scale datasets with millions of dimensions. This paper addresses the challenges of implementing large scale SpMV with FPGA and GPU in the application of web link graph analysis. In the FPGA implementation, we designed the task partition and memory hierarchy according to the analysis of datasets scale and their access pattern. In the GPU implementation, we designed a fast and scalable SpMV routine with three passes, using a modified Compressed Sparse Row format. Results show that FPGA and GPU implementation achieves about 29x and 30x speedup on a StratixII EP2S180 FPGA and Radeon 5870 Graphic Card respectively compared with a Phenom 9550 CPU.
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