{"title":"基于90nm CMOS技术的10Gbps/通道片上信号电路与阻抗无与伦比的CML驱动","authors":"T. Kuboki, A. Tsuchiya, H. Onodera","doi":"10.1109/ASPDAC.2007.357970","DOIUrl":null,"url":null,"abstract":"An on-chip signaling system consists of a CML driver, a differential transmission-line and a CML receiver is fabricated. We developed an impedance-unmatched driver for power reduction. The impedance-unmatched driver reduces the tail current of the CML buffer by tuning the load resistance. The designed circuit achieves 3mm, 10Gbps/channel on-chip signal transmission and the impedance-unmatched driver saves the energy per bit by 21% compared with a conventional impedance-matched driver.","PeriodicalId":362373,"journal":{"name":"2007 Asia and South Pacific Design Automation Conference","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 10Gbps/channel On-Chip Signaling Circuit with an Impedance-Unmatched CML Driver in 90nm CMOS Technology\",\"authors\":\"T. Kuboki, A. Tsuchiya, H. Onodera\",\"doi\":\"10.1109/ASPDAC.2007.357970\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An on-chip signaling system consists of a CML driver, a differential transmission-line and a CML receiver is fabricated. We developed an impedance-unmatched driver for power reduction. The impedance-unmatched driver reduces the tail current of the CML buffer by tuning the load resistance. The designed circuit achieves 3mm, 10Gbps/channel on-chip signal transmission and the impedance-unmatched driver saves the energy per bit by 21% compared with a conventional impedance-matched driver.\",\"PeriodicalId\":362373,\"journal\":{\"name\":\"2007 Asia and South Pacific Design Automation Conference\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-01-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 Asia and South Pacific Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.2007.357970\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Asia and South Pacific Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2007.357970","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10Gbps/channel On-Chip Signaling Circuit with an Impedance-Unmatched CML Driver in 90nm CMOS Technology
An on-chip signaling system consists of a CML driver, a differential transmission-line and a CML receiver is fabricated. We developed an impedance-unmatched driver for power reduction. The impedance-unmatched driver reduces the tail current of the CML buffer by tuning the load resistance. The designed circuit achieves 3mm, 10Gbps/channel on-chip signal transmission and the impedance-unmatched driver saves the energy per bit by 21% compared with a conventional impedance-matched driver.
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