用于快速事件驱动仿真的可重构逻辑机

J. Bauer, M. Bershteyn, I. Kaplan, Paul Vyedin
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引用次数: 39

摘要

随着VLSI电路密度的增加,软件技术无法通过验证所需的数百万次仿真周期有效地模拟设计。仿真可以提供必要的容量和性能,但仿真仅限于结构设计或可合成的设计。本文讨论了一种新的系统体系结构,该体系结构显著地加快了事件驱动行为仿真的速度,并描述了如何将其与仿真相结合。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A reconfigurable logic machine for fast event-driven simulation
As the density of VLSI circuits increases, software techniques cannot effectively simulate designs through the millions of simulation cycles needed for verification. Emulation can supply the necessary capacity and performance, but emulation is limited to designs that are structural or can be synthesized. The paper discusses a new system architecture that dramatically accelerates event-driven behavioral simulation and describes how it is merged with emulation.
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