{"title":"用于快速事件驱动仿真的可重构逻辑机","authors":"J. Bauer, M. Bershteyn, I. Kaplan, Paul Vyedin","doi":"10.1145/277044.277214","DOIUrl":null,"url":null,"abstract":"As the density of VLSI circuits increases, software techniques cannot effectively simulate designs through the millions of simulation cycles needed for verification. Emulation can supply the necessary capacity and performance, but emulation is limited to designs that are structural or can be synthesized. The paper discusses a new system architecture that dramatically accelerates event-driven behavioral simulation and describes how it is merged with emulation.","PeriodicalId":221221,"journal":{"name":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"39","resultStr":"{\"title\":\"A reconfigurable logic machine for fast event-driven simulation\",\"authors\":\"J. Bauer, M. Bershteyn, I. Kaplan, Paul Vyedin\",\"doi\":\"10.1145/277044.277214\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As the density of VLSI circuits increases, software techniques cannot effectively simulate designs through the millions of simulation cycles needed for verification. Emulation can supply the necessary capacity and performance, but emulation is limited to designs that are structural or can be synthesized. The paper discusses a new system architecture that dramatically accelerates event-driven behavioral simulation and describes how it is merged with emulation.\",\"PeriodicalId\":221221,\"journal\":{\"name\":\"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"39\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/277044.277214\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/277044.277214","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A reconfigurable logic machine for fast event-driven simulation
As the density of VLSI circuits increases, software techniques cannot effectively simulate designs through the millions of simulation cycles needed for verification. Emulation can supply the necessary capacity and performance, but emulation is limited to designs that are structural or can be synthesized. The paper discusses a new system architecture that dramatically accelerates event-driven behavioral simulation and describes how it is merged with emulation.