{"title":"多值电路中的并发检查和单向错误","authors":"D. Wessels, J. Muzio","doi":"10.1109/ISMVL.1992.186791","DOIUrl":null,"url":null,"abstract":"The concept of unateness for multiple-valued logic circuits and its usefulness for concurrent checking through the use of unidirectional error-detecting codes are examined. Three such codes are adapted for multivalued logic, and the set of operators which provide an internally unate circuit is described. For each code, modifications are provided to incorporate testing for primary input faults. Some area overhead evaluations are performed using benchmarks implemented on binary and quaternary programmable logic arrays.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Concurrent checking and unidirectional errors in multiple-valued circuits\",\"authors\":\"D. Wessels, J. Muzio\",\"doi\":\"10.1109/ISMVL.1992.186791\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The concept of unateness for multiple-valued logic circuits and its usefulness for concurrent checking through the use of unidirectional error-detecting codes are examined. Three such codes are adapted for multivalued logic, and the set of operators which provide an internally unate circuit is described. For each code, modifications are provided to incorporate testing for primary input faults. Some area overhead evaluations are performed using benchmarks implemented on binary and quaternary programmable logic arrays.<<ETX>>\",\"PeriodicalId\":127091,\"journal\":{\"name\":\"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic\",\"volume\":\"44 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1992.186791\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1992.186791","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Concurrent checking and unidirectional errors in multiple-valued circuits
The concept of unateness for multiple-valued logic circuits and its usefulness for concurrent checking through the use of unidirectional error-detecting codes are examined. Three such codes are adapted for multivalued logic, and the set of operators which provide an internally unate circuit is described. For each code, modifications are provided to incorporate testing for primary input faults. Some area overhead evaluations are performed using benchmarks implemented on binary and quaternary programmable logic arrays.<>