SM2算法硬件实现的SPA对策

Zhanzhan Chen, Liji Wu, Zhenhui Zhang, Dehang Xiao, Xiangmin Zhang, Yan Liu
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引用次数: 0

摘要

SM2算法广泛应用于金融IC卡。它具有操作速度快、签名短等优点,但也存在安全漏洞。攻击者可以通过简单功率分析(Simple Power Analysis, SPA)方法破解密钥,这是一种成本低廉且极其有效的方法,对SM2算法的安全性造成了极大的威胁。为了提高SM2算法的安全性,引入原子算法实现点相加和点加倍运算,提出了预计算非相邻形式(NAF)随机窗口算法实现标量乘法。基于SAKURA-G FPGA板的实验分析,改进的SM2算法可以成功抵抗SPA。与原算法相比,计算时间缩短了67.5%,切片寄存器数量增加了不到5%。SM2算法的安全性和速度得到了显著提高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A SPA Countermeasure for Hardware Implementation of SM2 Algorithm
SM2 algorithm is widely used in financial IC cards. It has the advantages of fast operation speed and short signature, but it may also contain security vulnerabilities. Attackers can crack the secret key via Simple Power Analysis (SPA), which is the inexpensive and extremely effective method, causing a great threat to the security of SM2 algorithm. In order to improve the safety of SM2 algorithm, this paper introduces atomic algorithm to implement point addition and point doubling operation, and proposes precomputed Non Adjacent Form (NAF) random window algorithm to achieve scalar multiplication. Based on experimental analysis with SAKURA-G FPGA board, the improved SM2 algorithm can resist successfully SPA. Compared with the original algorithm, the time of computation is reduced by 67.5%, and the number of slice registers has increased by less than 5%. The security and speed of SM2 algorithm has been significantly improved.
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