Implementation-independent model of an instruction set architecture using VHDL

A novel methodology is presented which allows the creation of implementation-independent functional models of systems. The methodology uses the VHSIC (very high speed integrated circuit) hardware description language (VHDL) which leads to the possibility of creating a unified design environment supporting system modeling at various stages of the design process. The motivation for the methodology was to assist in the analysis and specification of the WM computer architecture. An implementation-independent model of the WM architecture is provided which is intended as a first step in the development of an implementation. Additionally, architectural performance measures can be extracted from simulations using the model. The model can also serve as an architectural specification for the WM computer.<>