{"title":"基于PERL脚本的网表分析工具,用于检测ESD“大缓冲区”的配置","authors":"S. Darfeuille","doi":"10.1109/SMACD.2012.6339391","DOIUrl":null,"url":null,"abstract":"In this paper a tool written with the scripting language PERL and looking for “big buffer” configurations in analogue circuit designs is introduced. A big buffer is obtained when one or several big PMOS transistor (PMOST) and a small NMOS transistor (NMOST) are connected together while their gates are pulled-down to ground. During an electrostatic discharge (ESD) event this can result in the destruction of the NMOS device. Thus, it is crucial to prevent such configurations to be used in integrated circuits, especially considering the current trend to move towards advanced CMOS technology nodes even for analogue and RF design. The tool operates on Spectre netlists so it can be used even during very early phase of the circuit development process, enabling faster and simpler corrections at schematic level.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"PERL scripts-based netlist analysis tool for the detection of ESD “big buffer” configurations\",\"authors\":\"S. Darfeuille\",\"doi\":\"10.1109/SMACD.2012.6339391\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a tool written with the scripting language PERL and looking for “big buffer” configurations in analogue circuit designs is introduced. A big buffer is obtained when one or several big PMOS transistor (PMOST) and a small NMOS transistor (NMOST) are connected together while their gates are pulled-down to ground. During an electrostatic discharge (ESD) event this can result in the destruction of the NMOS device. Thus, it is crucial to prevent such configurations to be used in integrated circuits, especially considering the current trend to move towards advanced CMOS technology nodes even for analogue and RF design. The tool operates on Spectre netlists so it can be used even during very early phase of the circuit development process, enabling faster and simpler corrections at schematic level.\",\"PeriodicalId\":181205,\"journal\":{\"name\":\"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMACD.2012.6339391\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD.2012.6339391","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
PERL scripts-based netlist analysis tool for the detection of ESD “big buffer” configurations
In this paper a tool written with the scripting language PERL and looking for “big buffer” configurations in analogue circuit designs is introduced. A big buffer is obtained when one or several big PMOS transistor (PMOST) and a small NMOS transistor (NMOST) are connected together while their gates are pulled-down to ground. During an electrostatic discharge (ESD) event this can result in the destruction of the NMOS device. Thus, it is crucial to prevent such configurations to be used in integrated circuits, especially considering the current trend to move towards advanced CMOS technology nodes even for analogue and RF design. The tool operates on Spectre netlists so it can be used even during very early phase of the circuit development process, enabling faster and simpler corrections at schematic level.