Germanium Passivation for High-k Dielectric III-V MOSFETs and Temperature Dependence of Dielectric Leakage Current

We present depletion mode MOSFETs on the MBE grown n-GaAs layer with germanium (Ge) passivation layer, high-k HfO2 dielectric, and TaN metal gate showing excellent transistor characteristics (pleff376 cm2/Vs, gm 68 mS/mm) and ultra-thin EOT of 17 A. We also investigate the temperature dependence (ranging from 25°C and 125°C) of leakage currents in various gate dielectric stacks deposited on GaAs such as HfO2, HfO2/Si/Ge, and HfO2/Ge using the MOSCAPs with EOT ranging from 30 A to 11 A. The most challenging issue in GaAs devices is the lack of stable nature gate oxide such as SiO2 on Si substrate [1-3]. We used Ge single layer or silicon (Si)/Ge double layer as interfacial control layer (ICL) to passivate GaAs surface. From HfO2 MOSCAPs on n-GaAs(100) substrate, we obtained remarkable results such as small C-V frequency dispersion (< 8 %) and EOT of 11 A (HfO2 70 A) with low dielectric leakage current of _10-6 A/cm2 at VG-VFB = 1 V by employing Ge ICL [4]. Due to an additional introduction of Si layer, MOSCAPs with Si/Ge ICL show relatively thicker EOT (4-5 A) and reduced dielectric leakage current compared to the device with Ge only ICL (Fig. 1 and 2) at a given thickness of HfO2. As also shown in Fig. 1 and 2, without any passivation layer, HfO2 MOSCAPs show much thicker EOT and larger dielectric leakage current. These results indicate that Ge or Si/Ge ICL passivate effectively the GaAs surface sustaining high quality interface (Dit1011 1012/cm2-eV from Terman method). Fig. 3 shows the dielectric leakage currents as a function of operating temperature varying from 25°C to 125°C in the MOSCAPs with HfO2, HfO2/Si/Ge, and HfO2/Ge gate dielectric stacks. It is obvious that increase in dielectric leakage current according to temperature is much larger in the devices with only HfO2 gate dielectric stack in comparison with the devices with Ge and Si/Ge ICL. This indicates that Poole-Frenkel conduction becomes dominant and interface quality is not good as the devices with Ge or Si/Ge ICL, for which tunneling mechanism dominates. Fig. 4 shows schematic GaAs MOSFET structure and ring-type MOSFET structure. 600 A-thick