Complete tests in algorithm-based fault-tolerant matrix operation on processor arrays

Recently, F. T. Assaad and S. Dutt (1992) proposed the hybrid checksum test method for the floating-point matrix-matrix multiplication in ABFT environment, by which the error coverage can be greatly increased. However, the thresholded test in their approach is still not avoidable in the floating-point additions involved in matrix multiplication and the number of error detections decrease with the increase in the dynamic range of data, which is not totally satisfactory. The authors present an effective method, called concurrent floating-point checksum (CFPC) test, which provides very convincing error detection/correction capabilities for the part of floating-point addition with a minimum time latency and hardware overhead.