{"title":"使用信号流图变换的高级模拟合成","authors":"R.S. Guindi, M. Elmasry","doi":"10.1109/ASIC.1995.580750","DOIUrl":null,"url":null,"abstract":"A high-level top-down analog synthesis methodology is presented. It translates an initial signal flow graph representation of a transfer function into an architecture made of interconnected analog primitives. Constraints are imposed on the primitive weights and interconnections to ensure realizability. Transformations that generate realisable architectures are presented and illustrated through examples.","PeriodicalId":307095,"journal":{"name":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"High-level analog synthesis using signal flow graph transformations\",\"authors\":\"R.S. Guindi, M. Elmasry\",\"doi\":\"10.1109/ASIC.1995.580750\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high-level top-down analog synthesis methodology is presented. It translates an initial signal flow graph representation of a transfer function into an architecture made of interconnected analog primitives. Constraints are imposed on the primitive weights and interconnections to ensure realizability. Transformations that generate realisable architectures are presented and illustrated through examples.\",\"PeriodicalId\":307095,\"journal\":{\"name\":\"Proceedings of Eighth International Application Specific Integrated Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Eighth International Application Specific Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1995.580750\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Eighth International Application Specific Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1995.580750","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-level analog synthesis using signal flow graph transformations
A high-level top-down analog synthesis methodology is presented. It translates an initial signal flow graph representation of a transfer function into an architecture made of interconnected analog primitives. Constraints are imposed on the primitive weights and interconnections to ensure realizability. Transformations that generate realisable architectures are presented and illustrated through examples.