用于低功率收发器的射频CMOS集成电路

R. Murji, M. Jamal Deen
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引用次数: 1

摘要

在本文中,我们提出了与低功耗和高频收发器实现相关的集成电路设计结果。我们首先考虑传统的LC压控振荡器(VCO)及其工作原理。然后,我们研究了一个VCO的实现,该实现通过使用自动幅度控制(AAC)电路解决了传统LC VCO实现的许多实际问题。最后,讨论了一种利用宽带倍频器(FD)扩展振荡器工作频率的方法。所实现的带AAC的压控振荡器工作频率为7.2GHz,调谐范围为410MHz,相位噪声为-108dBc/Hz@1MHz, 1.8V电源的功耗为4.32mW。实现的倍频器从1V电源消耗985/spl mu/W,并具有4GHz的3dB带宽。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Radio frequency CMOS integrated circuits for low power transceiver applications
In this paper we present design results related to integrated circuits for low power and high frequency transceiver implementations. We first consider the traditional LC voltage-controlled oscillator (VCO) and its operation. We then examine an implementation of a VCO that solves many practical problems with the traditional LC VCO implementation with the use of an automatic amplitude control (AAC) circuit. Finally, a method to extend the operating frequency of an oscillator using a wideband frequency doubler (FD) is discussed. The implemented VCO with AAC has an operating frequency of 7.2GHz, a tuning range of 410MHz, a phase noise of -108dBc/Hz@1MHz and it dissipates 4.32mW from a 1.8V supply. The implemented frequency doubler consumed 985/spl mu/W from a 1V supply and had a 3dB bandwidth of 4GHz.
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