{"title":"用于大型Hopfield神经网络的新型VLSI架构","authors":"M. Verleysen, B. Sirletti, P. Jespers","doi":"10.1109/ESSCIRC.1988.5468264","DOIUrl":null,"url":null,"abstract":"A new CMOS architecture for Hopfield's neural networks is proposed. The use of differential amplifiers and active synapses allows the implementation of hundreds of neurons on a single chip. Since it is fully programmable, the circuit can be used as a content-addressable memory as well as in optimization problems.","PeriodicalId":197244,"journal":{"name":"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A new VLSI architecture for large Hopfield's neural networks\",\"authors\":\"M. Verleysen, B. Sirletti, P. Jespers\",\"doi\":\"10.1109/ESSCIRC.1988.5468264\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new CMOS architecture for Hopfield's neural networks is proposed. The use of differential amplifiers and active synapses allows the implementation of hundreds of neurons on a single chip. Since it is fully programmable, the circuit can be used as a content-addressable memory as well as in optimization problems.\",\"PeriodicalId\":197244,\"journal\":{\"name\":\"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1988.5468264\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '88: Fourteenth European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1988.5468264","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new VLSI architecture for large Hopfield's neural networks
A new CMOS architecture for Hopfield's neural networks is proposed. The use of differential amplifiers and active synapses allows the implementation of hundreds of neurons on a single chip. Since it is fully programmable, the circuit can be used as a content-addressable memory as well as in optimization problems.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
