{"title":"muller c -元素亚稳态表征","authors":"T. Polzer, A. Steininger","doi":"10.1109/PATMOS.2013.6662170","DOIUrl":null,"url":null,"abstract":"We1 present an approach for experimental metasta-bility characterization of Muller C-elements. It is based on the late transition detection scheme known from flip flop characterization. Substantial additional challenges arise from the facts that with the Muller C-element the input transition to use as a reference for the output delay may change from case to case, and the error flags of the detector need to be reliably synchronized into the other timing domain. Our solution strategy involves taking measurements concurrently and sorting out irrelevant results later on. This is done based on detailed information about type and relative position of input transitions as well as type and polarity of the output transition, for the collection of all of which we propose efficient means. An example study on an FPGA platform proves the applicability and correct operation of our approach.","PeriodicalId":287176,"journal":{"name":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Metastability characterization for muller C-elements\",\"authors\":\"T. Polzer, A. Steininger\",\"doi\":\"10.1109/PATMOS.2013.6662170\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We1 present an approach for experimental metasta-bility characterization of Muller C-elements. It is based on the late transition detection scheme known from flip flop characterization. Substantial additional challenges arise from the facts that with the Muller C-element the input transition to use as a reference for the output delay may change from case to case, and the error flags of the detector need to be reliably synchronized into the other timing domain. Our solution strategy involves taking measurements concurrently and sorting out irrelevant results later on. This is done based on detailed information about type and relative position of input transitions as well as type and polarity of the output transition, for the collection of all of which we propose efficient means. An example study on an FPGA platform proves the applicability and correct operation of our approach.\",\"PeriodicalId\":287176,\"journal\":{\"name\":\"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PATMOS.2013.6662170\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PATMOS.2013.6662170","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
摘要
我们提出了一种表征Muller c元素亚稳性的实验方法。它是基于从触发器特性中已知的延迟转换检测方案。对于Muller c -单元,作为输出延迟参考的输入转换可能会因情况而异,并且检测器的错误标志需要可靠地同步到另一个定时域,这一事实带来了实质性的额外挑战。我们的解决方案策略包括同时进行测量,并在稍后整理不相关的结果。这是基于输入转换的类型和相对位置以及输出转换的类型和极性的详细信息来完成的,对于所有这些信息的收集,我们提出了有效的方法。在FPGA平台上的实例研究证明了该方法的适用性和正确性。
Metastability characterization for muller C-elements
We1 present an approach for experimental metasta-bility characterization of Muller C-elements. It is based on the late transition detection scheme known from flip flop characterization. Substantial additional challenges arise from the facts that with the Muller C-element the input transition to use as a reference for the output delay may change from case to case, and the error flags of the detector need to be reliably synchronized into the other timing domain. Our solution strategy involves taking measurements concurrently and sorting out irrelevant results later on. This is done based on detailed information about type and relative position of input transitions as well as type and polarity of the output transition, for the collection of all of which we propose efficient means. An example study on an FPGA platform proves the applicability and correct operation of our approach.