{"title":"用于射频能量收集的理想阈值补偿整流器的数学模型","authors":"Doaa M. Elgabry, M. Aboudina, E. Hegazi","doi":"10.1109/ICECS.2015.7440323","DOIUrl":null,"url":null,"abstract":"This paper introduces a mathematical model of an ideally threshold compensated rectifier for RF energy harvesting. The ideally compensation arrangement has been exploited to improve the rectifier's performance and overcome the limitation of rectifier's sensitivity which mainly depends on the threshold voltage of the rectifying devices (transistors). The model considers the conduction angle and the reverse current in deriving closed form analytical expressions for output dc voltage and efficiency. Using a 65-nm low leakage CMOS process with low-threshold transistors, 900-MHz multi-stages rectifiers were designed using both the proposed model and Cadence Virtuoso. The results of the model extremely match the simulation results using Cadence Virtuoso while running 100 times faster.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A mathematical model of an ideally threshold compensated rectifier for RF energy harvesting\",\"authors\":\"Doaa M. Elgabry, M. Aboudina, E. Hegazi\",\"doi\":\"10.1109/ICECS.2015.7440323\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a mathematical model of an ideally threshold compensated rectifier for RF energy harvesting. The ideally compensation arrangement has been exploited to improve the rectifier's performance and overcome the limitation of rectifier's sensitivity which mainly depends on the threshold voltage of the rectifying devices (transistors). The model considers the conduction angle and the reverse current in deriving closed form analytical expressions for output dc voltage and efficiency. Using a 65-nm low leakage CMOS process with low-threshold transistors, 900-MHz multi-stages rectifiers were designed using both the proposed model and Cadence Virtuoso. The results of the model extremely match the simulation results using Cadence Virtuoso while running 100 times faster.\",\"PeriodicalId\":215448,\"journal\":{\"name\":\"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2015.7440323\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2015.7440323","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A mathematical model of an ideally threshold compensated rectifier for RF energy harvesting
This paper introduces a mathematical model of an ideally threshold compensated rectifier for RF energy harvesting. The ideally compensation arrangement has been exploited to improve the rectifier's performance and overcome the limitation of rectifier's sensitivity which mainly depends on the threshold voltage of the rectifying devices (transistors). The model considers the conduction angle and the reverse current in deriving closed form analytical expressions for output dc voltage and efficiency. Using a 65-nm low leakage CMOS process with low-threshold transistors, 900-MHz multi-stages rectifiers were designed using both the proposed model and Cadence Virtuoso. The results of the model extremely match the simulation results using Cadence Virtuoso while running 100 times faster.