采用Lubistor负载和NMOS驱动的新型CMOS逆变器

Jyi-Tsong Lin, Hsuan-Hsu Chen, Kuan-Yu Lu, Cheng-Hsin Chen
{"title":"采用Lubistor负载和NMOS驱动的新型CMOS逆变器","authors":"Jyi-Tsong Lin, Hsuan-Hsu Chen, Kuan-Yu Lu, Cheng-Hsin Chen","doi":"10.1109/ISNE.2010.5669181","DOIUrl":null,"url":null,"abstract":"This paper presents a non-conventional CMOS device, which is composed of an nMOSFET and a tunneling field effect transistor (TFET) for driver and load. Based on the measurement data of TFET device published, we have for the first time drawn the Q line of the new designed CMOS compared with the conventional CMOS to verify its feasibility. The static power consumption of it can be optimized and reduced to 4.6E–8 A, and all of the logic operations are correct and have enough swing for manipulating its following operation. Due to its unique structure and the output node being shared by the load and the driver, the integration density of it can be reduced dramatically. The area benefit thus more than 58.5% has been achieved compared with the conventional CMOS layout. In addition, the delay time is improved more than 63%.","PeriodicalId":412093,"journal":{"name":"2010 International Symposium on Next Generation Electronics","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A new type of CMOS inverter with Lubistor load and NMOS driver\",\"authors\":\"Jyi-Tsong Lin, Hsuan-Hsu Chen, Kuan-Yu Lu, Cheng-Hsin Chen\",\"doi\":\"10.1109/ISNE.2010.5669181\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a non-conventional CMOS device, which is composed of an nMOSFET and a tunneling field effect transistor (TFET) for driver and load. Based on the measurement data of TFET device published, we have for the first time drawn the Q line of the new designed CMOS compared with the conventional CMOS to verify its feasibility. The static power consumption of it can be optimized and reduced to 4.6E–8 A, and all of the logic operations are correct and have enough swing for manipulating its following operation. Due to its unique structure and the output node being shared by the load and the driver, the integration density of it can be reduced dramatically. The area benefit thus more than 58.5% has been achieved compared with the conventional CMOS layout. In addition, the delay time is improved more than 63%.\",\"PeriodicalId\":412093,\"journal\":{\"name\":\"2010 International Symposium on Next Generation Electronics\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Symposium on Next Generation Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISNE.2010.5669181\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Symposium on Next Generation Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2010.5669181","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种由nMOSFET和隧道场效应晶体管(TFET)组成的驱动和负载器件。基于已发表的TFET器件的测量数据,我们首次绘制了新设计CMOS的Q线,并与传统CMOS进行了比较,验证了其可行性。它的静态功耗可以优化到4.6E-8 A,所有的逻辑运算都是正确的,并且有足够的摆动来操纵它的后续运算。由于其独特的结构和输出节点由负载和驱动器共享,可以大大降低其集成密度。因此,与传统CMOS布局相比,面积效益超过58.5%。延迟时间提高了63%以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A new type of CMOS inverter with Lubistor load and NMOS driver
This paper presents a non-conventional CMOS device, which is composed of an nMOSFET and a tunneling field effect transistor (TFET) for driver and load. Based on the measurement data of TFET device published, we have for the first time drawn the Q line of the new designed CMOS compared with the conventional CMOS to verify its feasibility. The static power consumption of it can be optimized and reduced to 4.6E–8 A, and all of the logic operations are correct and have enough swing for manipulating its following operation. Due to its unique structure and the output node being shared by the load and the driver, the integration density of it can be reduced dramatically. The area benefit thus more than 58.5% has been achieved compared with the conventional CMOS layout. In addition, the delay time is improved more than 63%.
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