三维集成电路中Cu/SiO2到Cu/SiO2杂化键的电迁移研究进展

S. Moreau, D. Bouchu, J. Jourdon, B. Ayoub, S. Lhostis, H. Frémont, P. Lamontagne
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引用次数: 1

摘要

随着杂化键合(HB)节距的减小,出现了许多挑战。其中之一与基于hb的互连的可靠性有关,特别是它们的电迁移性能,因为电迁移(EM)相关的退化除了温度和机械应力外,还与电流密切相关。这项研究强调了当互连间距从6.84减小到1.44µm时,基于hb的互连中与em相关的失效模式发生了变化。最弱的环节从BEOL级移动到杂化键,但不影响使用条件下的预期性能。在设计方面所做的其他研究没有证据表明对HB砖的电迁移阻力有任何负面影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Recent Advances on Electromigration in Cu/SiO2 to Cu/SiO2 Hybrid Bonds for 3D Integrated Circuits
With hybrid bonding (HB) pitch reduction, many challenges are arising. One of them is related to the reliability of HB-based interconnects and in particular their electromigration performances as electromigration (EM)-related degradation is intimately linked to the electrical current in addition to temperature and mechanical stresses. This study highlights a change in the failure modes for EM-related failures in HB-based interconnects when decreasing the interconnect pitch from 6.84 down to 1.44 µm. The weakest link moves from the BEOL levels to hybrid bonding ones but without affecting the projected performance under use conditions. Additional studies done on design aspects do not evidence any negative impact on the electro migration resistance of the HB brick.
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