{"title":"电路延迟关键元件的概率辨识","authors":"D. Wessels, J. Muzio","doi":"10.1109/DFTVS.1993.595801","DOIUrl":null,"url":null,"abstract":"It is clear that defect fault tolerance must eventually be expanded to include tolerance of delay-inducing defects. A circuit operating near its optimal speed is particularly sensitive to delay increases caused by defects in components which lie on maximum length or near-maximum length true paths. For circuits with many long false paths the identification of key paths, and therefore key components, is a difficult problem. The authors use a randomized algorithm to quickly identify a circuit's optimal operating speed, and also the components in which delay defects are most likely to adversely affect circuit operation. Categorization of these components permits an optimal use of available resources in the introduction of delay defect tolerance.","PeriodicalId":213798,"journal":{"name":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Probabilistic identification of critical components for circuit delays\",\"authors\":\"D. Wessels, J. Muzio\",\"doi\":\"10.1109/DFTVS.1993.595801\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"It is clear that defect fault tolerance must eventually be expanded to include tolerance of delay-inducing defects. A circuit operating near its optimal speed is particularly sensitive to delay increases caused by defects in components which lie on maximum length or near-maximum length true paths. For circuits with many long false paths the identification of key paths, and therefore key components, is a difficult problem. The authors use a randomized algorithm to quickly identify a circuit's optimal operating speed, and also the components in which delay defects are most likely to adversely affect circuit operation. Categorization of these components permits an optimal use of available resources in the introduction of delay defect tolerance.\",\"PeriodicalId\":213798,\"journal\":{\"name\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1993.595801\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1993.595801","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Probabilistic identification of critical components for circuit delays
It is clear that defect fault tolerance must eventually be expanded to include tolerance of delay-inducing defects. A circuit operating near its optimal speed is particularly sensitive to delay increases caused by defects in components which lie on maximum length or near-maximum length true paths. For circuits with many long false paths the identification of key paths, and therefore key components, is a difficult problem. The authors use a randomized algorithm to quickly identify a circuit's optimal operating speed, and also the components in which delay defects are most likely to adversely affect circuit operation. Categorization of these components permits an optimal use of available resources in the introduction of delay defect tolerance.