MCM去耦电容器的高频特性

L. Schaper, G. Morcan
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引用次数: 17

摘要

CMOS微处理器和其他电路的频率增加对配电系统提出了严格的要求,以提供稳定,无噪声的电源。特别是在mcm中,短信号线长度允许快速的片外开关,因此需要改进的去耦电容器来进行短期电荷存储以降低dI/dt噪声。本文研究了片外连接、MCM配电平面和去耦电容的相对寄生贡献,以及这些寄生对配电完整性的影响。结果表明,通过在线键或倒装芯片环境中使用多个互连和精心设计,可以最大限度地减少芯片与衬底互连的电感影响。同样,无论是固体、穿孔还是新型互联网状电源系统,配电平面的固有电感和电阻都非常低,不能决定配电的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High frequency characteristics of MCM decoupling capacitors
The increased frequency operation of CMOS microprocessors and other circuitry places severe demands on power distribution systems to supply stable, noise-free power. Particularly in MCMs, where short signal line lengths allow fast off-chip switching, improved decoupling capacitors are required for short-term charge storage to reduce dI/dt noise. This paper examines the relative parasitic contributions of off-chip connections, MCM power distribution planes, and decoupling capacitors, and the effect of these parasitics on power distribution integrity. It is shown that the effect of the inductances of chip-to-substrate interconnections can be minimized by using multiple interconnections and careful design both in a wirebond or in a flip chip environment. Similarly, the intrinsic inductance and resistance of power distribution planes, either solid, perforated, or the new IMPS (Interconnected Mesh Power System), is extremely low and does not determine the effectiveness of power distribution.
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