Power loss model for MHz critical mode power factor correction circuits

Wide bandgap devices (WBGs) allow Power Factor Correction (PFC) circuits to operate at MHz frequency which leads to a better power density. Compared with kHz operation, MHz PFC in critical conduction mode (CrM) yields larger inductor valley current during the switch soft turn-on. Moreover, the input current distortion near grid voltage zero crossing has not been taken into account in the traditional model. As a result, the traditional PFC design tool shows major inaccuracy in switching frequency, inductor current envolopes and power loss estimation. The paper analyzes the problems in the traditional model, and proposes an improved power loss model to aid the design of MHz CrM PFC. Experimental results are shown to prove the accuracy of the proposed model.