A design-in methodology to ensure first time success of complex digital signal processors

TMS320C2700 is the first TI DSP with a new architecture combining the features of a traditional DSP and Micro-Controller, targeted for Hard Disk Drives, DVD and Embedded Control applications. The development of this reusable DSP Core and the Emulation Test Chip with an aim of fast turn-around to market posed many design and methodology challenges. These challenges included efficient layout of a datapath and bus-dominant Core, meeting all the performance and reliability requirements, clocking methodology for a reusable Core, and the design of a 1 million gate Emulation Chip with 82 K/spl times/16 on-chip RAM and many peripherals. This paper describes the various design-in approaches used to meet these goals, reducing the iterations in the design cycle, ultimately resulting in a first pass working silicon for the design.