基于FPGA的频率FIR滤波器2D-FIR滤波器的实现

A. Fakharian, Saeed Badr, M. Abdi
{"title":"基于FPGA的频率FIR滤波器2D-FIR滤波器的实现","authors":"A. Fakharian, Saeed Badr, M. Abdi","doi":"10.1109/RIOS.2015.7270745","DOIUrl":null,"url":null,"abstract":"In this paper, it is tried to transfer one of the powerful tools for image processing from the frequency domain to spatial domain. In which the frequency concepts is used in the field of image processing based on FPGA. The process is as follows that first a low-pass FIR filter in frequency domain is designed and then it is transferred from frequency domain to spatial domain and implemented as an IP Core standard structure in FPGA. The implemented IP CORE structure is streaming and the input and output images of type gray. Because the use of array and high-frequency processing in FPGA, it has wide applications in image processing field, especially for highspeed image processing. Finally, the implementation of 2D FIR filter and eyewitness in VGA's output and the comparison between the actual image and filtered image, it is obvious that high-frequency changes are decreased in the image.","PeriodicalId":437944,"journal":{"name":"2015 AI & Robotics (IRANOPEN)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementation of a frequency FIR filter as 2D-FIR filter based on FPGA\",\"authors\":\"A. Fakharian, Saeed Badr, M. Abdi\",\"doi\":\"10.1109/RIOS.2015.7270745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, it is tried to transfer one of the powerful tools for image processing from the frequency domain to spatial domain. In which the frequency concepts is used in the field of image processing based on FPGA. The process is as follows that first a low-pass FIR filter in frequency domain is designed and then it is transferred from frequency domain to spatial domain and implemented as an IP Core standard structure in FPGA. The implemented IP CORE structure is streaming and the input and output images of type gray. Because the use of array and high-frequency processing in FPGA, it has wide applications in image processing field, especially for highspeed image processing. Finally, the implementation of 2D FIR filter and eyewitness in VGA's output and the comparison between the actual image and filtered image, it is obvious that high-frequency changes are decreased in the image.\",\"PeriodicalId\":437944,\"journal\":{\"name\":\"2015 AI & Robotics (IRANOPEN)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 AI & Robotics (IRANOPEN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RIOS.2015.7270745\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 AI & Robotics (IRANOPEN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RIOS.2015.7270745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文试图将一种强大的图像处理工具从频域转移到空间域。其中将频率概念应用于基于FPGA的图像处理领域。设计过程如下:首先在频域设计一个低通FIR滤波器,然后将其从频域转移到空间域,并在FPGA上实现为IP核标准结构。所实现的IP核结构为流式,输入输出图像为灰度类型。由于FPGA采用了阵列和高频处理,在图像处理领域有着广泛的应用,特别是在高速图像处理方面。最后,在VGA输出中实现二维FIR滤波器和目击证人,并将实际图像与滤波后的图像进行比较,可以明显看出图像中的高频变化有所减少。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Implementation of a frequency FIR filter as 2D-FIR filter based on FPGA
In this paper, it is tried to transfer one of the powerful tools for image processing from the frequency domain to spatial domain. In which the frequency concepts is used in the field of image processing based on FPGA. The process is as follows that first a low-pass FIR filter in frequency domain is designed and then it is transferred from frequency domain to spatial domain and implemented as an IP Core standard structure in FPGA. The implemented IP CORE structure is streaming and the input and output images of type gray. Because the use of array and high-frequency processing in FPGA, it has wide applications in image processing field, especially for highspeed image processing. Finally, the implementation of 2D FIR filter and eyewitness in VGA's output and the comparison between the actual image and filtered image, it is obvious that high-frequency changes are decreased in the image.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信