{"title":"150nm SOI嵌入式sram具有非常低的SER","authors":"D. Nelson, H. Liu, K. Golke, A. Kohli","doi":"10.1109/SOI.2005.1563583","DOIUrl":null,"url":null,"abstract":"A split word line design technique that improves the soft error rate (SER) of high performance 150nm SOI embedded SRAMs is presented along with SER results.","PeriodicalId":116606,"journal":{"name":"2005 IEEE International SOI Conference Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"150nm SOI embedded SRAMs with very low SER\",\"authors\":\"D. Nelson, H. Liu, K. Golke, A. Kohli\",\"doi\":\"10.1109/SOI.2005.1563583\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A split word line design technique that improves the soft error rate (SER) of high performance 150nm SOI embedded SRAMs is presented along with SER results.\",\"PeriodicalId\":116606,\"journal\":{\"name\":\"2005 IEEE International SOI Conference Proceedings\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE International SOI Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2005.1563583\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2005.1563583","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A split word line design technique that improves the soft error rate (SER) of high performance 150nm SOI embedded SRAMs is presented along with SER results.
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