Effects of dielectric degradation and breakdown in MOSFETs characteristics. Impact on digital and analog circuits.

To clarify the impact of the gate oxide degradation and breakdown (BD) on CMOS circuits functionality it is necessary to develop models for broken down devices that can be included in circuit simulators. Transistors with different geometries have been experimentally stressed to provoke oxide degradation and BD. The transistors characteristic curves after degradation have been fitted with SPICE BSIM4 model. The extracted model parameters have been included in a circuit simulator to study the effect of the oxide degradation and BD on analog (current mirror) and digital (RS latches) circuits. The separate influence on the current mirror performance of the BD gate current and the variation of transistor BSIM parameters has also been analyzed.