A. H. M. Shirazi, Amir Nikpaik, Reza Molavi, S. Mirabbasi, S. Shekhar
{"title":"具有高调谐范围和低相位噪声的c类自混频vco结构,适用于毫米波应用","authors":"A. H. M. Shirazi, Amir Nikpaik, Reza Molavi, S. Mirabbasi, S. Shekhar","doi":"10.1109/RFIC.2015.7337716","DOIUrl":null,"url":null,"abstract":"Achieving high tuning-range and low phase-noise simultaneously in mm-wave voltage-controlled oscillators (VCO) has been a severe design challenge. Our architecture, referred herein as a self-mixing VCO (SMV), utilizes a Class-C push-push VCO topology to generate the first (f0) and second harmonics (2f0) and then mixes them together to obtain the desired third harmonic (3f0) component. Compared to a fundamental-mode VCO operating at 3f0 in mm-wave band, the SMV architecture achieves superior frequency tuning range (FTR) and phase-noise (PN) performance. A Class-C topology enhances the second-harmonic content to improve mixing efficiency, decreases parasitic capacitance and reduces phase noise. A 52.8-to-62.5 GHz SMV prototype is designed and implemented in a 0.13-μm CMOS process. Measurement results show an FTR of 16.8% together with a PN of -100.57 dBc/Hz at 1 MHz offset - resulting in an FTR-inclusive figure-of-merit (FOMT) of -190.85 dBc/Hz while consuming 7.6 mW from a 1.2 V supply voltage.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A Class-C self-mixing-VCO architecture with high tuning-range and low phase-noise for mm-wave applications\",\"authors\":\"A. H. M. Shirazi, Amir Nikpaik, Reza Molavi, S. Mirabbasi, S. Shekhar\",\"doi\":\"10.1109/RFIC.2015.7337716\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Achieving high tuning-range and low phase-noise simultaneously in mm-wave voltage-controlled oscillators (VCO) has been a severe design challenge. Our architecture, referred herein as a self-mixing VCO (SMV), utilizes a Class-C push-push VCO topology to generate the first (f0) and second harmonics (2f0) and then mixes them together to obtain the desired third harmonic (3f0) component. Compared to a fundamental-mode VCO operating at 3f0 in mm-wave band, the SMV architecture achieves superior frequency tuning range (FTR) and phase-noise (PN) performance. A Class-C topology enhances the second-harmonic content to improve mixing efficiency, decreases parasitic capacitance and reduces phase noise. A 52.8-to-62.5 GHz SMV prototype is designed and implemented in a 0.13-μm CMOS process. Measurement results show an FTR of 16.8% together with a PN of -100.57 dBc/Hz at 1 MHz offset - resulting in an FTR-inclusive figure-of-merit (FOMT) of -190.85 dBc/Hz while consuming 7.6 mW from a 1.2 V supply voltage.\",\"PeriodicalId\":121490,\"journal\":{\"name\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2015.7337716\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337716","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Class-C self-mixing-VCO architecture with high tuning-range and low phase-noise for mm-wave applications
Achieving high tuning-range and low phase-noise simultaneously in mm-wave voltage-controlled oscillators (VCO) has been a severe design challenge. Our architecture, referred herein as a self-mixing VCO (SMV), utilizes a Class-C push-push VCO topology to generate the first (f0) and second harmonics (2f0) and then mixes them together to obtain the desired third harmonic (3f0) component. Compared to a fundamental-mode VCO operating at 3f0 in mm-wave band, the SMV architecture achieves superior frequency tuning range (FTR) and phase-noise (PN) performance. A Class-C topology enhances the second-harmonic content to improve mixing efficiency, decreases parasitic capacitance and reduces phase noise. A 52.8-to-62.5 GHz SMV prototype is designed and implemented in a 0.13-μm CMOS process. Measurement results show an FTR of 16.8% together with a PN of -100.57 dBc/Hz at 1 MHz offset - resulting in an FTR-inclusive figure-of-merit (FOMT) of -190.85 dBc/Hz while consuming 7.6 mW from a 1.2 V supply voltage.