基于GaN的NMOS数字逻辑门电路与e型功率GaN moshemt的单片集成

Minghua Zhu, E. Matioli
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引用次数: 23

摘要

在这项工作中,我们通过在硅衬底上集成E/ d模式GaN MOSHEMTs,展示了高性能NMOS基于GaN的逻辑门,包括NOT, NAND和NOR。采用e模GaN MOSHEMT的多指栅极设计优化了负载驱动电阻比,提高了逻辑摆幅电压和噪声裕度,缩短了过渡周期。实现了最先进的NMOS逆变器,在5 V电源电压下逻辑摆幅电压为4.93 V,在室温下低输入噪声裕度为2.13 V,高输入噪声裕度为2.2 V。优异的高温性能,在300°C时,逻辑摆幅为4.85 V,低输入噪声裕度为1.85 V,高输出噪声裕度为2.2V。此外,还首次报道了基于gan的NAND和NOR NMOS逻辑门,其性能非常好。最后,逻辑门与高压e模功率晶体管进行了单片集成,这表明GaN功率晶体管与栅极驱动器的单片集成向前迈出了重要的一步。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Monolithic integration of GaN-based NMOS digital logic gate circuits with E-mode power GaN MOSHEMTs
In this work, we demonstrate high-performance NMOS GaN-based logic gates including NOT, NAND, and NOR by integration of E/D-mode GaN MOSHEMTs on silicon substrates. The load-to-driver resistance ratio was optimized in these logic gates by using a multi-finger gate design of E-mode GaN MOSHEMT to increase the logic swing voltage and noise margins, and reduce the transition periods. State-of-the-art NMOS inverter was achieved with logic swing voltage of 4.93 V at a supply voltage of 5 V, low-input noise margin of 2.13 V and high-input noise margin of 2.2 V at room temperature. Excellent high temperature performance, at 300°C, was observed with a logic swing of 4.85 V, low-input noise margin of 1.85 V and high-output noise margin of 2.2V. In addition, GaN-based NAND and NOR NMOS logic gates are reported for the first time with very good performance. Finally, the logic gates were monolithically integrated with high-voltage E-mode power transistors, which reveals a significant step forward towards monolithic integration of GaN power transistors with gate drivers.
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