一种9b、1.25ps分辨率粗精时间-数字转换器，用于放大时间残留

2007 IEEE Symposium on VLSI Circuits Pub Date : 2007-06-14 DOI:10.1109/VLSIC.2007.4342701

Minjae Lee, A. Abidi

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引用次数: 120

摘要

采用90nm CMOS实现了9b 1.25 ps两步时间-数字转换器。它采用一种新的电路来放大时间残差，并通过子范围归一化来补偿失配。DNL和INL分别为plusmn0.8 LSB和plusmn2 LSB。它可以用作数字输出的鉴相器。

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A 9b, 1.25ps Resolution Coarse-Fine Time-to-Digital Converter in 90nm CMOS that Amplifies a Time Residue

A 9 b 1.25 ps two step time-to-digital converter is implemented in 90 nm CMOS. It uses a new circuit to amplify the time residue, and compensates mismatch with subrange normalization. DNL and INL are, respectively, plusmn0.8 LSB and plusmn2 LSB. It can be used as a phase detector with digital output.

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2007 IEEE Symposium on VLSI Circuits

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