比较150nm PD-SOI和块体工艺电路的性能、漏功率和开关功率，包括SOI历史效应的影响

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) Pub Date : 2001-06-14 DOI:10.1109/VLSIC.2001.934244

S. Narendra, J. Tschanz, A. Keshavarzi, S. Borkar, V. De

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引用次数: 12

摘要

在150nm SOI技术中对不同电路的历史效应测量显示，对最坏情况下的延迟和泄漏权衡没有不利影响。SOI的性能优势主要来自于电容的减小。因此，它将随着技术的扩展而减少。

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Comparative performance, leakage power and switching power of circuits in 150 nm PD-SOI and bulk technologies including impact of SOI history effect

History effect measurements on different circuits in a 150 nm SOI technology show no adverse impact on worst-case delay vs. leakage trade-offs. The performance advantage of SOI over bulk is shown to come mostly from capacitance reduction. Hence, it will diminish with technology scaling.

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来源期刊

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)

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