{"title":"用于智能电源集成电路的ESD鲁棒集成输出器件","authors":"S. Pendharkar, J. Brodsky, P. Hower, R. Steinhoff","doi":"10.1109/ISPSD.2005.1488022","DOIUrl":null,"url":null,"abstract":"An integrated lateral output device is presented which has a very high degree of ESD robustness. The high ESD robustness is achieved with negligible increase in the overall size of the output device. Such an integrated device is ideally suited for high voltage output pins requiring low on-state resistance (Rdson) with stringent system level IEC requirements.","PeriodicalId":154808,"journal":{"name":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"ESD robust integrated output device for smart power ICs\",\"authors\":\"S. Pendharkar, J. Brodsky, P. Hower, R. Steinhoff\",\"doi\":\"10.1109/ISPSD.2005.1488022\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An integrated lateral output device is presented which has a very high degree of ESD robustness. The high ESD robustness is achieved with negligible increase in the overall size of the output device. Such an integrated device is ideally suited for high voltage output pins requiring low on-state resistance (Rdson) with stringent system level IEC requirements.\",\"PeriodicalId\":154808,\"journal\":{\"name\":\"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2005.1488022\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2005.1488022","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ESD robust integrated output device for smart power ICs
An integrated lateral output device is presented which has a very high degree of ESD robustness. The high ESD robustness is achieved with negligible increase in the overall size of the output device. Such an integrated device is ideally suited for high voltage output pins requiring low on-state resistance (Rdson) with stringent system level IEC requirements.